It is better to design the standard
cell circuit which is developed to be a desirable logic function
with the CMOIS structure transistor. Because of this structure
of transistor uses smaller area on the silicon wafer than the
CMOS transistor design more than 12.5% with the same circuit
operation. The general standard cell circuits in gate array
design consist of three sections. The first is the input circuits
which use to receive the input signal and drive it to the internal
circuits in the form of inverting or noninverting output signal.
The second is the output driver circuits which use to drive
the output signal of the internal circuit to the next state
with the suitable voltage and current. And the last is the operation
circuits which use to fit the desirable function of the designer.
All of them are designed and fabricated with the nonsymmetrical
design of CMOIS transistor. Then its performance, as the transient
response, the sink and source current, the output voltage, and
operation functions are measured. The experimental results show
that the circuit can be operated between 4 to 15 volts. The
transient response characteristics of the circuits are opposite
with the CMOS circuits. In other words, the rise time of the
output signal (tr) is less than the fall time (tf). Nevertheless,
the desirable functions are the same as the functions of CMOS
circuits.
Back
